1. Field of the Invention
The present invention relates to a digital-to-analog converter for converting a digital input signal to an analog output signal.
2. Description of The Prior Art
Known digital-to-analog converters have been configured in such a manner that a summer employing a differential amplifier circuit is provided to produce the sum of the outputs of unit weighting elements each of which comprises a capacitor. An example thereof has been reported, for example, in "A Multi-Bit .SIGMA..DELTA. DAC with Dynamic Element Matching Techniques", Feng Chen and Bosco Leung, Proc. IEEE 1992 Custom Integrated Circuits Conference, pp. 16.2.1-16.2.4. In the digital-to-analog converter described therein, a binary digital code is converted to a decimal analog value. Within substantially equal capacitors, serving as the weighting elements, provided in the converter, a number of capacitors corresponding in number to the decimal analog value are used through Metal-Oxide-Semiconductor (MOS) transistor switches such that a summer produces an analog quantity. Further, an approach has been proposed in order to prevent the linearity of the converter from being damaged due to minute errors in capacitance among the capacitors. In the approach, different combinations of used capacitors are dynamically selected one after another during a period of time (i.e. a main period of time) in which a digital code is converted to an analog quantity, such that outputs from the respective capacitors are averaged.
Even with the design as mentioned above, the digital-to-analog converter still has a critical disadvantage that MOS transistors required to be provided in respective feedback loops within the summer leave in the channels of the transistors, upon switching, stored charges the amount of which are non-linear with respect to the output voltage of the summer. As a result, the linearity as well as the immunity to noise including harmonic distortion is adversely affected thereby causing a deterioration in performance.
Digital-to-analog converters may produce output signals in the form of current other than the above-mentioned voltage. An example is the digital-to-analog converter disclosed in Japanese Patent Appln. Public-Disclosure No. 1-204527. This performs digital-to-analog conversion using, as weighting elements, unit current sources which are substantially equal to each other. An approach has been proposed in order to prevent the analog performance of the converter from being damaged due to minute errors among the respective current sources. The approach dynamically selects different combinations of used current sources one after another during a period of time, i.e. a main period of time in which a digital code is converted to an analog quantity, thereby averaging errors among the outputs of the unit current sources.
The most important performance factor for the converter characteristics of digital-to-analog converters is the equality or matching of devices which constitute respective unit weighting elements used in summation. Although the above-mentioned conventional approaches have been proposed to improve the performance factor, the linearity and the noise immunity realized thereby are still insufficient due to a problem with the operation principle of the respective devices and due to a problem with the averaging techniques. Further, both examples involve a problem that the linearity of the output analog quantity deteriorates when the output analog value changes between a main period and the subsequent main period.